Digital design with FPGAs (Coursera)
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Aug 1st 2022
Andrey Rashich
Main areas of research: — Implementation in FPGAs: decoders for polar codes, LDPC and turbo-code, time synchronization, demodulation and equalization. — FTN signaling, spectrally efficient multicarrier (MC) and single carrier (SC) signals: signal reception theory and simulations. Spectrally effective MC signals (SEFDM, BEFDM, WOFDM…), multicomponent SC signals (FTN). Signal envelope optimization and effective reception schemes, PAPR reduction. — Signal processing for Wi-Fi, UMTS, LTE: reception and registration of broadcast data. Time and frequency synchronization. MIMO decoding and equalization. Demodulation and channel decoding. Analysis of service information tables. Matlab Publications: — Aleksei Krylov, Andrey Rashich, Chao Zhang, and Kewu Peng “Offset Generation and Interlayer Network Architecture for 5GNR LDPC Parallel Layered Decoder with Variable Lifting Factor Support”, The 20th International Conference on Next Generation Wired/Wireless Advanced Networks and Systems, St. Petersburg, Russia, 2020. Proceedings — Valentin Salnikov, Andrey Rashich, Viet Them Nguyen and Wei Xue “BER performance of SEFDM signals in LTE fading channels with imperfect channel knowledge”, The 20th International Conference on Next Generation Wired/Wireless Advanced Networks and Systems, St. Petersburg, Russia, 2020. Proceedings — Alexandr Katyushnyj, Aleksei Krylov, Andrey Rashich, Chao Zhang, Kewu Peng “FPGA implementation of LDPC decoder for 5G NR with parallel layered architecture and adaptive normalization”, 2020 IEEE International Conference on Electrical Engineering and Photonics EExPolytech), St. Petersburg, Russia