FPGA Capstone: Building FPGA Projects (Coursera)

FPGA Capstone: Building FPGA Projects (Coursera)
Course Auditing
Categories
Effort
Certification
Languages
You should have a experience in digital design and C programming before taking this course, and also complete the first 3 courses in this series.
Misc

MOOC List is learner-supported. When you buy through links on our site, we may earn an affiliate commission.

FPGA Capstone: Building FPGA Projects (Coursera)
This course will give you hands-on FPGA design experience that uses all the concepts and skills you have developed up to now. You will need to purchase a DE10-Lite development kit. You will setup and test the MAX10 DE10-Lite board using the FPGA design tool Quartus Prime and the System Builder.

Class Deals by MOOC List - Click here and see Coursera's Active Discounts, Deals, and Promo Codes.

MOOC List is learner-supported. When you buy through links on our site, we may earn an affiliate commission.

You will:

- Design and test a Binary Coded Decimal Adder.

- Design and test a PWM Circuit, with verification by simulation.

- Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design.

- Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer). Instantiate this design into a top-level DE10-Lite HDL file.

- Compile your completed hardware using Quartus Prime.

- Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse.

- Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer) and the SBT.

- Compile your completed software using the SBT.

- Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit.

Record all your observations in a lab notebook pdf.

Submit your project files and lab notebook for grading.

This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or less of video lectures, plus reading assignments, discussion prompts, and project assignment that involves creating hardware and/or software in the FPGA.

Course 3 of 3 in the FPGA Design for Embedded Systems Specialization.


What You Will Learn

- Create a working FPGA design using Quartus Prime and run it on an evaluation board

- Understand and practice all aspects of FPGA development, including conception, design, implementation, and debugging.

- Create in the FPGA a working system on a chip design with Nios II soft processor, RAM and FLASH memory, and several peripherals.

- Become familiar with the FGPA development flow, particularly in the case of a SoC with software development flow included.


Syllabus


WEEK 1

Hands on: Altera MAX10 Hardware Setup

In this module you will begin your hands-on exploration of FPGA design by setting up a target board, the DE10-Lite based on the MAX10 Intel Altera FPGA. In this module you will:

- Setup and test the MAX10 board using the FPGA design tool Quartus Prime and the System Builder. - Design and test a Binary Coded Decimal Adder.

- Record all your observations in a lab notebook pdf.

- Submit your project files and lab notebook for grading. Completing this module will help prepare you for the work to be done in the modules that follow.


WEEK 2

Develop a Mixed Signal System

The goal of this module is to develop a mixed-signal system. You will construct hardware that uses the Analog to Digital Converter (ADC) inputs and Pulse Width Modulate (PWM) outputs to make a voltage measuring instrument. In this module you will:

- Create a working design, using most aspects of the Quartus Prime Design Flow. Design and test a PWM Circuit, with verification by simulation.

- Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design. - Record all your observations in a lab notebook pdf.

- Submit your project files and lab notebook for grading. Completing this module will help prepare you for the work to be done in the modules that follow.


WEEK 3

Create a System on a Chip with NIOS II

The goal of this module is to develop the hardware for a System on a Chip (SoC). You will construct hardware that creates a NIOS II soft processor along with several interfaces to devices on the DE10-Lite development kit. In this module you will:

- Create a working design, using most aspects of the Quartus Prime Design Flow.

- Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Builder). Instantiate this design into a top-level DE10-Lite HDL file.

- Compile your completed hardware using Quartus Prime.

- Record all your observations in a lab notebook.

- Submit your project files and lab notebook for grading. Completing this module will provide a platform for the work to be done in the module that follows.


WEEK 4

Software for a System on a Chip

The goal of this module is to develop the software for a System on a Chip (SoC). You will build software for a NIOS II soft processor you built in Module 3, using several interfaces to devices on the DE10-Lite development kit as well. In this module you will



0
No votes yet

MOOC List is learner-supported. When you buy through links on our site, we may earn an affiliate commission.

Course Auditing
65.00 EUR/month
You should have a experience in digital design and C programming before taking this course, and also complete the first 3 courses in this series.

MOOC List is learner-supported. When you buy through links on our site, we may earn an affiliate commission.