SOC Verification using System Verilog (Udemy) Self Paced Free Course Udemy Instructor Made Course Categories CS: Information & Technology Effort 4 Weeks Self-Study Languages English A comprehensive course that teaches System on Chip design verification concepts and coding in System Verilog Language. Technology ASIC Design Chip Design VLSI SOC Design System Verilog View more details Self Paced Free Course Udemy Instructor Made Course CS: Information & Technology 4 Weeks Self-Study English