SOC Verification using System Verilog (Udemy)
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A comprehensive course that teaches System on Chip design verification concepts and coding in System Verilog Language.
Self Paced
Expert and Passionate Verification Engineer having several years of experience in design verification of complex Microprocessors, ASIC and SOC designs at major semiconductor companies like Intel, IBM and other exciting startups. Passionate in continuous learning of new and interesting technologies and always ready to share knowledge and help others.
More info: http://linkedin.com/in/mramdas