This course is Part 3 of a 3-part series on digital systems, providing an introduction to the hardware/software interface and is based on a course offered by the MIT Department of Electrical Engineering and Computer Science. Topics include pipelined computers, virtual memories, implementation of a simple time-sharing operating system, interrupts and real-time, and techniques for parallel processing.
What you'll learn:
- How to use pipelining to increase a processor’s throughput
- Virtualization as a way to share a single processor among many tasks
- Basic organization of a simple time-shared operating system
- Appropriate techniques for parallel processing
Course Syllabus
- Pipelined Beta: pipelined execution of instructions, data and control hazards, resolving hazards using bypassing, stalling and speculation.
- Virtual Memory: extending the memory hierarchy, paging using hierarchical page maps and look-aside buffers, contexts and context switching, integrating virtual memories with caches.
- Operating Systems: processes, interrupts, time sharing, supervisor calls.
- Devices and Interrupts: device handlers asynchronous I/O, stalling supervisor calls, scheduling, interrupt latencies, weak and strong priority systems.
- Processes, Synchronization and Deadlock: inter-process communication, bounded buffer problem, semaphores for precedence and mutual exclusion, semaphore implementation, dealing with deadlock.
- Interconnect: the truth about wires, point-to-point vs. shared interconnect, communication topologies.
- Parallel Processing: instruction-, data- and thread-level parallelism, Amdahl’s Law, cache coherency.
- Labs: optimizing your Beta design for size and speed, emulating instructions, extending a simple time-sharing operating system.