Daniel Chaver-Martinez

Daniel A. Chaver-Martinez obtained a Physics Degree from University of Santiago de Compostela (USC) in 1998 and an Electronic Engineering Degree from University Complutense of Madrid (UCM) in 2000. He completed his PhD from 2000 to 2006 at UCM and since 2012 he has been an Associate Professor there. He has taught many different courses and published more than 30 papers and patents related to computer architecture. Since 2015, he has been collaborating with Imagination Technologies in the development of some of their processors and teaching materials.

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Computer Architecture with an Industrial RISC-V Core [RVfpga] (edX) EdX
Linux Foundation,LinuxFoundationX

Computer Architecture with an Industrial RISC-V Core [RVfpga] (edX)

Security & Networking

Dive into the world of Computer Architecture with our comprehensive course that focuses on implementing an Industrial RISC-V Core targeted for RVfpga platforms. This practical guide will equip you with hands-on skills in designing a RISC-V System-On-Chip (SoC) and utilizing simulation tools to bring your architecture to life.

Self Paced
Self-Paced
Computer Architecture FPGA RISC-V
Details
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