Axel Scherer

 

 


 

Axel Scherer is a senior engineer and manager with over 10 years of experience building new markets and innovating technical products. Currently, Axel is leading a team for Testbenches and Verification Methodologies in the Functional Verification R&D group at Cadence Design Systems, a leading global Electronic Design Automation company.


More info: www.linkedin.com/pub/axel-scherer/1/226/a99




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How to Verify Chips and Eliminate Bugs.

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