ISSCC Previews: Circuit and System Insights, covering several fields, including wireless and wireline comm., analog, digital, and memory.
As a researcher, design architect, entrepreneur and chief executive, Dr. Lu has dedicated his career to the worldwide IC design and semiconductor industry. He is Chairman, CEO and Founder of Etron Technology, Inc. and co-founded several other high-tech companies which are all public. He pioneered both 3D-DRAM SPT-Trench cell and low power array architecture used by IBM and it's licensees from 4Mb to 1Gb DRAMs and in embedded DRAMs, and won an IBM Corporate Award. In early 1990s he designed and co-architected advanced 8"-wafer DRAM/Logic technologies for helping Taiwan's fabless/foundry IC industry grown to today's prominent position. Since 1999 he has led the designs of Known-Good-Die DRAM products enabling 3D stacked-die system chips, which summoned the new rise of an Heterogeneous Integration Era as described in his 2004 ISSCC Plenary Talk. He has continued to design a series of HSDRAMs (High Speed DRAM) accelerating access time 3X faster than normal DRAMs in 1984 and an additional 2X improvement by 2014. He received his Ph.D. from Stanford and published over 50 papers and 24 US patents. He serves as Chairman of TSIA and WSC and was Chairman of GSA (2009-2011). He is an IEEE Fellow, a member of NAE/USA, Chair of A-SSCC, and a recipient of Taiwan's Medal of Science and Technology and the 1998 IEEE Solid-State Circuits Award.
More info: http://www.etron.com/en/aboutus/executives.php