• After completing this course, the learners will have the tools to evaluated different computer architectures as well as the software executing on them.
• The learners of this course will have knowledge about modern microprocessors and the design techniques used to increase their performance.
• Basic skills to evacuate the performance of computer systems
This week we first present a definition of computer architecture and the overall objectives of this specialization. Then we will learn how to measure and summarize performance, and about Amdahl's famous law. Finally we will give an introduction to embedded systems.
Graded: Fundamentals of Computer Architecture and Introduction to Embedded Systems
ISA Design and MIPS64
The set of instructions supported by a processor is called its Instruction Set Architecture (ISA). This week we will learn the MIPS64 ISA, which will be used for code examples throughout this specialization. We will also learn some basic code optimizations that reduce the number of instructions.
Graded: MIPS64 and Optimizations
Review of Pipelining
This week we will learn about pipelining, which is a technique that overlaps the execution of several instructions. Pipelining is a key implementation technique to make CPUs fast. Using the canonical 5-stage pipeline for illustration, we will learn about pipelining hurdles called hazards and how they can be solved.
Multicycle Operations and Pipeline Scheduling
This week we extend the canonical 5-stage pipeline with multicycle operations; operations that require multiple cycles to execute. Thereafter we learn how instructions can be scheduled in order to reduce the number of pipeline stalls.
Graded: Multicycle Operations & Pipeline Scheduling
To bridge the gap between processor speed and memory speed, modern processors employ caches. Caches are high-speed memories that contain recently used code and data. This week we will learn the basics of caches (how they are organized, how data is found in the cache, etc.). In addition, we will learn the average memory access time (AMAT) equation as well as 5 basic cache optimizations that aim at reducing the AMAT.